1. Field of the Invention
This invention relates to liquid crystal displays, and more particularly to an adaptive method and apparatus for preventing the formation of residual images in liquid crystal displays upon powering off.
2. Discussion of the Related Art
Generally, liquid crystal displays (LCDs) display pictures using electric fields to control the light transmittance of a liquid crystal. To this end, LCDs include a liquid crystal display panel for supporting a pixel matrix and a driving circuit for driving the liquid crystal display panel.
Referring to FIG. 1, LCDs generally include a liquid crystal module 10 for displaying a picture in response to video data signals inputted from a system part 2.
System part 2 includes a graphic card 4 for supplying signals (e.g., video data, etc.) suitable for driving the liquid crystal module 10, a system power supply 8 for supplying power, and a microcomputer 6 for controlling the system power supply 8.
The graphic card 4 converts inputted video data signals according to a resolution specific for a liquid crystal display panel 20, applies the converted video data signals to the liquid crystal module 10, and generates control signals (e.g., a main clock signal, a vertical synchronizing signal a horizontal synchronizing signal, etc.) specific to the resolution of the liquid crystal display panel 20.
The system power supply 8 supplies a driving voltage required to operate the graphic card 4 and the microcomputer 6. The supplied driving voltage is subsequently applied to a liquid crystal module (LCM) power supply 14 and inverter 24 included within the liquid crystal module 10.
The microcomputer 6 controls the system power supply 8 in accordance with a user command inputted through a power switch (not shown). The microcomputer 6 controls the amount of power applied to the LCM power supply 14 and a ramp power applied to the inverter 24 via the system power supply 8. For example, through the system power supply 8, the microcomputer 6 controls the time during which power is applied to the LCM power supply 14 and the time during which ramp power is applied to the inverter 24. Typically, the system power supply 8 is activated over the same time period during which the LCM power supply 14 is activated while the system power supply 8 is activated over a different time period during which the inverter 24 is activated. For example, inverter 24 is activated after the system power supply 8 is activated and is deactivated before the system power supply 8 is deactivated. Accordingly, an off-time of the inverter 24 occurs at an earlier point in time compared to the off-time of the system power supply 8.
The liquid crystal module 10 includes the liquid crystal display panel 20 for supporting liquid crystal cells, a data driver 16 for driving data lines D1 to Dm included in the liquid crystal display panel 20, a gate driver 18 for driving gate lines G0 to Gn included in the liquid crystal display panel 20, a timing controller 12 for controlling a driving time of the data and gate drivers 16 and 18, respectively, the LCM power supply 14 for generating driving voltages required for driving the liquid crystal display 10, a gamma circuit 22 for supplying gamma voltages to the data driver 16, a backlight unit 26 for providing light required to display pictures on the liquid crystal display panel 20, and an inverter 24 for supplying a driving voltage to the backlight unit 26.
The microcomputer 6 controls the system power supply 8 in accordance with a user command inputted through a power switch (not shown). The microcomputer 6 controls the amount of power applied to the LCM power supply 14 and a lamp power applied to the inverter 24 via the system power supply 8. For example, through the system power supply 8, the microcomputer 6 controls the time during which power is applied to the LCM power supply 14 and the time during which lamp power is applied to the inverter 24. Typically, the system power supply 8 is activated over the same time period during which the LCM power supply 14 is activated while the system power supply 8 is activated over a different time period during which the inverter 24 is activated. For example, inverter 24 is activated after the system power supply 8 is activated and is deactivated before the system power supply 8 is deactivated. Accordingly, an off-time of the inverter 24 occurs at an earlier point in time compared to the off-time of the system power supply 8.
The timing controller 12 accepts video data signals (e.g., R, G, and B) outputted from the graphic card 4 and applies the accepted video data signals to the data driver 16. Further, the timing controller 12 accepts a control signal outputted from the graphic card 4 and generates timing signals to control the timing of the data and gate drivers 16 and 18, respectively. Additionally, the timing controller 12 generates other control signals (e.g., polarity inversion signal, etc.).
The liquid crystal display panel 20 includes liquid crystal cells, arranged in a matrix pattern, connected to thin film transistors (TFTs). Each of the TFTs are provided at intersections of gate lines G1 to Gn and data lines D1 to Dm. The TFTs respond to gate signals applied from gate lines G1 to Gn and receive video signals applied from the data lines D1 to Dm. Each liquid crystal cell consists of a pixel electrode connected to an opposing common electrode via a liquid crystal and TFT. Accordingly, each liquid crystal cell may be equivalently expressed as a liquid crystal capacitor Clc. Such liquid crystal cells include a storage capacitor Cst connected to a pre-stage gate line in order to sustain data voltages charged within the liquid crystal capacitor Clc until subsequent data voltages are charged.
In response to a control signal outputted from the timing controller 12, the gate driver 18 sequentially applies a gate high voltage signal to gate lines G1 to Gn. The data driver 16 converts the video data signals outputted from the timing controller 12 into analog video voltage signals and applies analog video voltage signals, specific to one horizontal line, to data lines D1 to Dn for each horizontal period during which a gate high voltage signal is applied to the gate lines G1 to Gn. The gamma circuit 22 applies a predetermined gamma voltage to the data driver 16 in accordance with voltage levels associated with the analog video voltage signals. Thus, the data driver 16 uses gamma voltages supplied from the gamma circuit 22 to convert the video data signals outputted from the timing controller 12 into analog video voltage signals.
The inverter 24 converts a driving voltage inputted from the system power supply 8 into a high alternating current voltage corresponding to a lamp luminance of the backlight unit 26. The backlight unit 26 is provided at a rear side of the liquid crystal display panel 20 and supplies light suitable for displaying a picture. Accordingly, the backlight unit 26 includes lamp arranged within a lamp housing, a light guide for guiding light emitted from the lamp toward a surface of the liquid crystal panel, optical sheets attached to the light guide to enhance desirable lighting properties, and a reflector attached to a rear side of the light guide.
Referring to FIG. 2, a method for driving the liquid crystal display illustrated in FIG. 1 will now be described.
At time T1, if a ‘power-on’ command is inputted by a user, the microcomputer 6 turns the system power supply 8 on such that a driving voltage is applied to the LCM power supply 14. In turn, the LCM power supply 14 generates driving voltages (e.g., a base driving voltage Vcc, a gate high voltage Vgh, a gate low voltage Vgl, etc.) required to drive the liquid crystal module 10.
Simultaneously, at T1, if a reset signal (RESET) is generated from the microcomputer 6, the graphic card 4 generates video data signals at time T2 and applies the generated video data signals to the liquid crystal module 10. Using the driving voltages generated by the LCM power supply 14, the liquid crystal module 10 applies video data signals generated by the graphic card 4 to the liquid crystal display panel 20.
Subsequently, at time T3, the microcomputer 6 allows a lamp voltage (Vlamp) to be applied to the inverter 24 via the system power supply 6. As the lamp is activated by the lamp voltage (Vlamp) outputted by the inverter 24, the backlight unit 26 emits light into the liquid crystal display panel 20. Thus, the liquid crystal display panel 20 controls a transmittance of the light emitted from the backlight unit 26 in accordance with inputted video data signals, to display a picture.
A driving operation of the liquid crystal display panel 20 will now be described.
As the TFT is turned on by a gate high voltage Vgh applied to a gate line G, a video voltage signal, applied to the data lines D1 to Dm, is charged within the liquid crystal capacitor Clc. As the TFT is turned off by a gate low voltage Vgl applied to the gate line G, the video voltage signal remains charged within the liquid crystal capacitor Clc until the next data voltage signal is applied. Accordingly, the storage capacitor Cst connected to the liquid crystal capacitor Clc, in parallel, is charged with a data voltage signal when a gate high voltage Vgh is applied to a pre-stage gate line Gi-1. When a gate low voltage Vgl is applied, a higher voltage than the data voltage signal charged in the liquid crystal capacitor Clc is maintained during a turn-off interval of the thin film transistor. Thus, since the storage capacitor Cst applies electric charges to the liquid crystal capacitor Clc during a turn-off interval of the TFT, the variation in the voltage charged within the liquid crystal capacitor Clc is minimized.
At time T4, a power-off command is inputted from a user and the microcomputer 6 shuts off the lamp voltage applied to the inverter 24, via the system power supply 8. At time T5, the microcomputer 6 turns the system power supply 8 and the LCM power supply 14 off.
If the system power supply 8 is turned off, a problem occurs in that a video voltage charged within each liquid crystal cell of the liquid crystal display panel 20 slowly discharges through a leakage current of the TFT. This slow discharge causes residual images to be displayed by the liquid crystal display panel 20.
In order to eliminate residual images generated upon power-off, a separate discharge circuit may be provided to discharge voltages charged within each of the liquid crystal cells. For instance, a discharge circuit so provided may monitor a power-off event and apply a ground voltage to the gate lines to turn the TFTs on. Thus, the discharge circuit rapidly discharges voltages charged in each liquid crystal cell to eliminate residual images. However, as such discharge circuits must be provided at each gate line, the structure of the liquid crystal display panel becomes complex. Furthermore, when discharge circuits are applied to dot or line inversion liquid crystal modules, TFTs are turned on in liquid crystal cells having a negative voltage lower than the ground voltage applied to the gate electrode and thereby perform the compulsory discharge. On the other hand, TFTs are turned off in liquid crystal cells having positive voltage higher than the ground voltage and thereby do not perform the compulsory discharge. Accordingly, residual images still exist in dot or line inversion liquid crystal modules. Moreover, voltages charged in the liquid crystal cells employing the above discharge circuit are compulsorily discharged because are not sufficient to eliminate residual images because a certain discharge time exists.